Efficient Instruction Sequencing with Inline Target Insertion

نویسندگان

  • Wen-mei W. Hwu
  • Pohua P. Chang
چکیده

The trend of deep pipelining and multiple instruction issue has made instruction sequencing an extremely critical issue. Traditionally, compiler-assisted instruction sequencing methods have been considered not suitable for deep pipelining and multiple instruction issue. Hardware methods such, as Branch Target Buffers have been proposed for deep pipelining and multiple instruction issue. This paper defines Inline Target Insertion, a specific compiler and pipeline implementation method for Delayed Branches with Squashing. The method is shown to offer ,TI C two important features not discovered in previous work. Firs' bi ,-ches inserted into branch slots are correctly executed. Therefore, the instruction sequenciu6 efficiency is limited solely by the accuracy of compile-time branch prediction. This feature coupled with highly accurate compile-time branch prediction gives Inline Target Insertion excellent performance characteristics. Second, the execution returns correctly from interrupts or exceptions with only one single program counter. There is no need to reload other sequencing pipeline state information. These two features make Inline Target Insertion a superior alternative (better performance and mmmmmmmmm H i ni H $1 less software/hardware complexity) to the conventional delayed branching mechanisms. The compiler part of Inline Target Insertion has been shown to be straightforward with an implementation in the IMPACT-I C Compiler. A new code expansion control method has been proposed and included in the implementation. The code expansion and instruction sequencing efficiency are measured for real UNIX and CAD programs. The size of programs, the variety of programs, and the variety of inputs to each program are significantly larger than those used in the previous experiments. The stability of code restructuring based on profile information is proved empirically using a large number of diverse inputs to each benchmark program. The results show that Inline Target Insertion achieves high sequencing efficiency at a small cost of code expansion for deep pipelining and multiple instruction issue.

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Eecient Instruction Sequencing with Inline Target Insertion 1

The trend of deep pipelining and multiple instruction issue has made instruction sequencing an extremely critical issue. This paper de nes Inline Target Insertion, a speci c compiler and pipeline implementation method for Delayed Branches with Squashing. The method is shown to o er two important features not discovered in previous studies. First, branches inserted into branch slots are correctl...

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عنوان ژورنال:
  • IEEE Trans. Computers

دوره 41  شماره 

صفحات  -

تاریخ انتشار 1992